Programmable logic devices typically include embedded memory blocks that may be used to store configuration data. For instance, a static random access memory (SRAM) module on a programmable logic device (e.g., a field programmable gate array (FPGA)) may be used to store configuration data loaded from a non-volatile memory module upon the power up of the programmable logic device.
As the programmable device needs to read data to and from the SRAM module during operation, the SRAM module may affect the overall performance of the programmable device. For instance, power leakage in embedded memory modules may contribute to increased power consumption in a programmable device.
Generally, in order to reduce power leakage, unused embedded memory blocks (e.g., SRAM blocks) may be switched off or powered down and only used memory blocks are turned on. As such, memory blocks may be turned on and off based on specific user configurations.
In order to further reduce power leakage, memory blocks may also be turned on or off based on different operating modes. For instance, a programmable device may be placed in a standby mode when not in active use, and in order to reduce power consumption, embedded memory modules may be turned off during standby mode. In this instance, the embedded memory modules are only turned on when the programmable device is in active operating mode.
However, the embedded memory modules may be volatile memory modules that may not be able to retain stored configuration data once turned off. Therefore, in order to ensure stored configuration data are not lost, the embedded memory modules may not be turned off even when the programmable device is in standby mode.
As such, there may still be power leakage even when the programmable device is in standby mode because the embedded memory modules may still need to be powered to prevent unwanted loss of data.